Inphi Reduces Power with CMOS 100GbE PHY
Sept 19, 2011 - Sunnyvale, CA - We recently had a chance to talk to Inphi about their new CMOS entry into the 100GbE space. The offering are a series of 100GbE PHY and CDR (clock data recovery) products that are targeting support for the 4 lane configuration that operates at 28Gb/s in addition to the current 10x10G configuration.
The 10G and 25G PHY application space is getting quite large with implementation in core routers, data center switches and blade servers. The metro marketplace is approaching critical mass of the 40G data rate being composed of 4 lanes of 10G. The growth of the area for the 40G and 100G networks is being driven by voice and video content and the need for large file size transfers as opposed to historically smaller dbms and office application data sets.
The high reliability for the 100G market is currently dominated by 10 lane solutions using 10G optical connections. These are currently using two chip solutions and are typically SiGe technology. The issue with moving these solutions up to the 100G space, is the power factor. These SiGe solutions consume over 20W in a CFP form factor for a 100G configuration. The roadmap is calling for CFP4 form factor that utilizes a sub 5W foot print and will allow for the density and scaling to support 1Tbps configurations.
The Inphi CMOS solutions are built using the TSMC 40nm process. This allows for the creation of a low power (under 3.5W) solution using the CMOS PHY as part of a 10:4 gearbox solution, and transmit & receive CDRs for 100G networks. This allows for fully tiered compute environments with 100G in the core, 10G in the data center and distributed 1G at the endpoints.
The PHY supports 100G BASE-LR4/ER4 and OTU4 28 Gbps operation for OTL4.4, programmable transmit and adaptive receive equalization on all SerDes interfaces with fine granularity and control which allow performance to surpass IEEE CAUI, CEI-11G SR and CEI-28G VSR specifications. Additionally, it has numerous self-test and loopback modes that allow diagnostic monitoring of channel and system parameters. The CDR features programmable transmit and adaptive receive equalization on all SerDes interfaces with fine granularity and control which allow performance to surpass CEI-28G VSR specifications.
In addition to these modules, they have also released a companion transimpedance amplifier (TIA)/limiting amplifier (LIA) for 100GbE receivers. These products are available in production in 2012 and sampling to key customers.