Wednesday, March 22nd, 2017

Xilinx expands FPGA IP to meet CCAP specs


 November 15, 2011 - Xilinx has a new IP based solution for their 28nm 7 series FPGA family for cable operators to build a programmable and future proof headend system. The IP created in partnership with RADX supports up to 160 QAM channels per RF port and the largest of the FPGAs can support 6 of these ports for close to 1000 QAM channels in a single device.

Future Combined Cable Headend Configuration


This system was designed to allow for single chip implementations targeted for MSOs to meet their simultaneous need for voice video and data transport from one piece of equipment that conform to the new converged cable access platform (CCAP) specification from CableLabs. The Xilinx solution offers a new programmable capability for moving more edge QAM channels in a smaller footprint that will help drive the growth in cable headend hardware and allow it be competitive with IPTV solutions. The edge QAM hardware is a rapidly growing and is used in DOCSIS/M-CMTS, video on demand and switched digital video application worldwide. Because the FPGA solution is field re-programmable, as these specification are being upgraded, the speed, performance, and capacity of the Xilinx part will allow for continued use of the equipment with only a programming download change. The 7 Series FPGA solution also supports the creation up conversion logic inside the FPGA rather than being a separate board for further power and space reduction for the cable operators.

Xilinx/RADX QAM demo setup for SCTE Cable-Tec 2011


The 28nm 7 series FPGA solution works with both the Kintex- 7 and Virtex- 7 products. To supplement their use in this space Xilinx and RADX have created high speed DAC evaluation boards that include products from either Maxim or Analog Devices to provide a full testable RF solution. The demo and evaluation include J.83 modulation IP, a frequency agile digital up- converter, and a digital pre-distortion and compensation block for the high-speed DAC. A key portion is the Xilinx Modelware Traffic Manager which handles all of the systems juggling for the 160 QAM channels. The development system is going to be released in Q1 of 2012 and will initially support a single RF channel with 160 QAM channel using the Virtex 485T. Over the balance of 2012, additional development boards supporting to four and six RF ports will be released.

Xilinx / RADX Dual RF development board avail Q1\'12


This product to improve both the operating expense (OPEX) and capital expense (CAPEX) of cable operators. The design of the reduced power and footprint head end equipment is supported by software development kits white papers and product briefs explaining the edge QAM marketplace. This system and the demo boards were released and shown at the SCTE Cable-Tec Expo in Nov.

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