Sunday, March 26th, 2017

Mentor User2User Rhines Keynote

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 April 12, 2012, Mentor User2User Conference, Santa Clara, CA—Wally Rhines from Mentor Graphics opened the conference with a talk on " doing what others don't" in his keynote address. Hs was trying to counter the conventional wisdom that in the EDA industry, the big companies continue and the small companies innovate, then get acquired.

Mentor recently surpassed the $1B threshold and has been experiencing a 7 percent CAGR. Industry analysts show that the company is now holding about a 24 percent market share of all EDA and is in the number 1 position in 17 separate markets.

The PCB market has been fairly flat since '85 at about $100M. The only changes have been in the mix of tools adding high-speed analysis to the standard board design tool suites. This behavior, to grow at a high rate then plateau, happens in all sectors over time.

The only time tools can see rapid growth is when new methodologies appear, so the industry has to continue to find and develop new methodologies. At the '04 DAC, Mentor introduced DFM and system-level design tools. The industry was going flat for the mature tools.

The result is that DFM tools are seeing a 28 percent CAGR, formal tools are growing at 12 percent, and ESL is growing at 11 percent. The trailing edge for ASIC and IC tools is now power analysis which is growing at about 9 percent. The rest of EDA is up almost 1 percent CAGR.

Therefore, any company that intends to grow has to find the next problems to fix. One area is low power analysis at higher levels of abstraction. This problem first appeared in '99, when wireless manufacturers started using ModelSim. The tools evolved to power-aware RTL and eventually morphed into the UPF design standard.

The challenge for the tools is that system-level optimizations have the greatest impact on the total power consumption, but the physical design has the greatest resolution. The systems architects have to define the high-level interactions and data flows so the circuit designers can identify the various power states and transitions.

The analysis can start from existing IP and power models and can use the embedded software as a point of leverage. In '95, software became the dominant portion of system design. The following year, they determined that hardware design is not the same as embedded software development. The various teams use different tools and flows. In fact, the groups don't even use same words to describe functions.

The logical evolution is to merge the domains. The Sourcery open source code bench and standard interfaces allow a change in approaches and open the industry to a new way to attack the problems. Mentor supports the open source tools with over 50 people contributing code to the organization.

Now the technologies and flows are changing. Design teams can trade software execution against the power demands. Nucleus power management is now available in an RTOS, because code size is proportional to power efficiency.

For functional verification beyond RTL, the Universal Verification Methodology (UVM) is expected to grow 286% next year. Directed tests have moved to constrained random testing, which is being combined with intelligent testing to become the operational parts of the intelligent testbench. The changes depend upon the design structure and the advent of multiprocessing has enabled the technology. The appearance of parallel processing for verification testing scales linearly with the number of processors.

When the software-based tests become insufficient for the task, an alternative is to go to in-circuit emulation (ICE) and use some accelerated virtual hardware The combination of hardware acceleration and co-emulation for verification can offer orders of magnitude increase in verification clock rates.

With transaction-level models (TLM), the software can be used as a stimulus enabling virtual stimulus and software debug in a batch mode on the emulators. Therefore, the emulator becomes the center of the simulation environment and becomes the hardware equivalent of a server farm. TLM plus the virtual prototypes accelerates off-line software debug.

Physical verification can move beyond DFM. DRC checking is only the tip of the iceberg. Since the tools already have the detailed topologies, adding reliability, power, and many other analyses is straightforward. The ERC deck can add checks for ESD, electrical overstress, and with the addition of current flows, electro-migration. The physical analysis tools can change lead spacing for multiple supply voltages and validate design intent. The physical tools can also check 2.5-D stacked die with interposers. The tools only have to verify the interfaces between the chips and not all of the design details.

DFT tools are able to move beyond compression. By integrating BIST and compression, the tools can automatically insert test points for low coverage sections. Hierarchical test enables greater IP reuse and reduces test development times. The DFT tools can also create 3-D IC tests and can generate cell-level ATPG.

PCB design can encompass many other functions. By combining ESL tools and virtual prototypes with board tools, the tools analyze DFM, data flow, equipment configurations from chip to package to PCB all co-designed at the system level for planning and optimization. These functions can be extended to the 3-D integrated ICs.

One other way to get growth is to find new problems for existing products. One area is by moving into different product areas like automotive and aerospace design. The underlying technologies become an engine platform for various analyses. Currently over 200 OEM equipment manufacturers are using wiring analysis tools for network analysis, bandwidth confirmation, and many other functions. These companies use the tools to measure system performance against constraints and track designs through the full end market supply chain.

Thermal management tools work at the package, box, and systems levels to characterize the possible thermal issues in the design. The tools can identify the fluid dynamics and the multi-physics simulations check mechanical, optical, and electrical functions across multiple applications.

A company can grow by anticipating problems and creating solutions. Growth can be from internal developments or from acquisitions as long as the new capabilities solve real problems.

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