Friday, October 31st, 2014

August 26, 2013, Hot Chips Conference, Stanford, CA—Prakash Iyer from Intel presented the internal details of the latest Atom processor. Clovertrail+ is a dual core processor manufactured in a 32nm high-k, metal gate process and is directed towards phones and tablets. The 32-bit machine has integrated memory controller, graphics subsystems, GPU, various encoders and decoders, [...]

August 26, 2013, Hot Chips Conference, Stanford, CA—John Sell described the basic internals of the Xbox main SoC. Although there are marketing issues associated with the console, the main chip includes an impressive collection of functional blocks. The main chip mates with the wireless control and the Kinect hardware plus the southbridge, which addresses 8GB [...]

 August 8, 2011, Hot Chips 23, Stanford, CA—Richard Kessler described a MIPS-based multi-core processor that raises the bar for performance/$/Watt. This chip is focused on networking and wireless server functions and has an integrated security engine for cryptographic operation acceleration. It is designed to take advantage of packet and flow parallelism and exhibits linear performance [...]

 May 4, 2011, Multicore Expo, San Jose, CA—We talked to the Adapteva people about their high core-count, floating-point microprocessor. This chip is programmable in C using standard development tools like GCC and eclipse. An experimental test chip with this architecture had one thousand processors on the chip. The basic microprocessor is based on a new [...]