Friday, March 24th, 2017

December 2016 – After an extended period of gradual change the past decade, AMD has released a new computing architecture for the desktop computing environment for the personal computer marketplace. The architecture change to the new “Zen” design modernizes the single tasked office automation (wordprocessing, spreadsheets, etc) optimized structure to a multitask and media centric [...]

August 2016 – At the Flash Memory Summit, Multi-core processor developer Kalray was showing their new application in the storage space. The new solution uses not only the majority of the CPU power for processing but, also allows for the implementation of storage interfaces, high speed NICs and crypto. The product features in path encryption [...]

 February 2015 – At the ISSCC conference in San Francisco, AMD presented their latest APU architecture on their new processor codename “Carrizo”. The Accelerated Processing Unit (APU)is designed for notebooks and low-power desktop designs and features an advanced power management technology. It is expected that the Carrizo to reduce the power consumed by the new [...]

February 2014 – At the RSA 2014 conference in San Francisco, the theme of security had an underlying theme of mobile devices/thin clients connected to high speed and cloud based networks. These networks have been updated to the latest generation multicore servers which have enhanced throughput. As a result the edge of network devices in [...]

October 2013 – In Santa Clara at the fall Linley Processor Conference, we had a chance to sit down with the folks from Netronome to get some details on their new NFP-6xxx series network flow processor. The new chip is the continuation of the IPX line of network processors that has been the core of [...]

August 26, 2013, Hot Chips Conference, Stanford, CA—Prakash Iyer from Intel presented the internal details of the latest Atom processor. Clovertrail+ is a dual core processor manufactured in a 32nm high-k, metal gate process and is directed towards phones and tablets. The 32-bit machine has integrated memory controller, graphics subsystems, GPU, various encoders and decoders, [...]

February 2013 – This years Solid State Circuit conference featured a processor session that was focusing on increasing cache size and more cores at low power. The rise in data size being handled by these units, has driven the systems to explore new architectures that are much more throughput oriented rather than MIPS/GFLOPs oriented. This [...]

 February 20, 2012 – The theme of the microprocessor session at ISSCC was no longer raw speed and performance, rather it was data processing throughput per watt of power. Low power and reduced stages for data processing were the key. The session opened with Intel presenting the 22nm introduction of their new ivybridge processor which [...]

 March 23, 2011 – San Jose, CA – The annual Samsung System LSI group was once again focused on the mobile marketplace. The event featured discussion of the foundry services group and the roadmap for manufacturing technology down through the 14nm/13nm process node. Additional discussions were on the impact of mobile devices on display, memory, [...]