December 9, 2010, 3-D Architectures for Semiconductor Integration and Packaging conference, Burlingame, CA— Bob Patti, CTO at Tezzaron Semiconductor illustrated the changes in complexity when changing from wafer-level to 3-D integration. The span of interconnect densities goes from 100 to 1 million connections per square mm and may total from 1000′s to tens of millions. [...]