Ultralow Power Transponder in Thin Film Circuit Technology on Foil

December 17, 2014, IEDM, San Francisco—Tung-Huei Ke from Imec demonstrated the results of an ultra low power (ULP) transponder chip (XPDR) with sub 1V operation This organic CMOS thin film circuits TFTs on foil shows promise for low power operation in IoT applications. .

Ubiquitous sensing applications such as body area network (BAN) and environmental monitoring wireless sensor networks have driven the innovations of TFTs on foil in the past decade. Organic TFT technology is of interest for advantages like low process temperature and its potential in low cost flexible and disposable electronics. However, tens of volts are required in the previous publications to power advanced circuits such as line driver and radio frequency identification tags. This increases the challenge to drive the circuits by battery or energy harvester e.g. via radio frequency interface.

Here we demonstrate for the first time an ULP organic CMOS technology applying it to circuits with various complexity. Functional circuits including an inverter, 19-stage ring oscillator (RO), and 8 bit XPDR with sub 1V supply voltage are demonstrated.
The supply voltage (Vdd) of the XPDR is down to 0.55V with data rate up to 35 bits/sec. The total power consumption (Ptot) of the XPDR is between 2.5 µW to 16 µW when Vdd is between 0.9 V to 2 V.

The design is fabricated on a 6-inch polyethylene naphthalate (PEN) foil on carrier (FOC) substrate. Atomic layer deposition (ALD) grown Al2O3 is employed as dielectric layer (e=8) and bilayer Ti/Au (2 nm/30 nm) metallization are applied as source, drain and gate electrodes. The FOC substrates are first treated by pentafluorobenzenethiol (PFBT) for carrier injection enhancement. Next, a layer of poly(amethylstyrene) (PaMS) is spin-coated for dielectric passivation. Afterwards, 30 nm of p-type material, 3,9diphenyl-peri-xanthenoxanthene (Ph-PXX), is thermally evaporated.

We further deposit 200 nm of parylene-C for p-type semiconductor passivation. The p-type/parylene-C stack is then patterned by photolithography with the orthogonal resist technology. A protection layer is deposited afterward to protect the patterned p-type TFTs from the degradations due to the n-type TFTs fabrication. With photolithography, we etch through the protection layer to open the n-type area. A n-tetradecylphosphonic acid (C14PA) solution is then employed as surface treatment of the Al2O3 in the n-type area for the n-type semiconductor, N3004. Finally, 30 nm of N3004 are thermally evaporated as n-type semiconductor.

The inverter starts to operate at Vdd of 0.5V with a gain of 3 and a switching threshold (Vth) of 0.05 V. The low peak to peak voltage (Vp-p) of 0.27 V and low Vth are due to the imbalanced pTFT and nTFT current at Vdd of 0.5 V. The Pstatic of the inverter is 1 nW at Vdd of 0.5V and is 9 nW at Vdd of 2 V. The low Pstatic can be attributed to the well-designed CMOS inverter. With increasing Vdd, the Vth moves toward half Vdd, thus the NM increases accordingly. The inverter shows rail to rail voltage swing from Vdd of 0.9 V and the gain remains at the level of 8 at higher Vdd. The noise margin is 53 percent of Vdd/2 at Vdd of 2V. It is worth to notice that the noise margin is still 9 percent of Vdd/2 even with Vdd of 0.5V. The large NM at low operation voltage is essential to realize low voltage advanced circuits.

Forty TFTs are integrated together to realize the 19-stage RO circuit. The RO start to operate at Vdd of 0.5V with operation frequency up to 82 Hz and with a Ptot of 0.17 µW. The W/L of the p-type and n-type TFTs are 560/5 µm/µm and 140/5 µm/µm, respectively. Thirty transistors for both p-type and n-type TFTs are characterized to study the parameters distribution. The average value of the mobilities and Von of the p-type TFTs are 0.04 cm2/Vs and 0.33 V, respectively, while the average value of the mobilities and Von of the n-type TFTs are 0.29 cm2/Vs and 0.006 V.

The high uniformity of the parameters is a pre-requisit to design advanced integrated circuits at a low supply voltage. We observed some effects of contact resistance at low Vds in the n-type output characteristics. This effect can be reduced by increasing the channel length which would compromise the speed of the circuits.

The 8 bit XPDR starts to render the correct embedded code from Vdd = 0.55V with data rate of 35 bits/second. This is the lowest operation voltage ever reported for transponder chip fabricated by thin film technology. We further measured the circuit up to 2V and the measured data rate is up to 582 bits/sec. The data rate and the Ptot of the transponder chip versus Vdd is 2.5 µW at Vdd of 0.9 V and is 16 µW at Vdd of 2 V.

Furthermore we power the XPDR by a commercial AAA battery with 1.6V output voltage. Battery powered XPDR with data rate of 465 bits/sec are demonstrated. Assuming the charges of the battery is 1200 mAh, the battery could ideally (assuming no self-discharge) drive the XPDR for 21.9 years. We can therefore envision to combine this technology with printed thin film batteries for ubiquitous sensing applications.