HSA launches V1.0spec at GTC 2015
March 2015 – At an event held concurrently with the opening of the Nvidia GTC conference, the Heterogeneous System Architecture (HAS) Foundation, released their Version 1.0 Specification. The spec has three major components and is targeted to address the design and programming of mixed CPU and specialty processors (GPU, DSP, etc) systems. These computing systems can range from mobile devices to desktops to HPC & HyperScale sytems in addition to servers.
The foundation now sports over 43 member companies and 17 universities that are participating in the full design chain ranging from hardware issues to operating system modifications to new compilers and programing language libraries & extensions. The tools include development of SOC devices with these advanced hardware resources. The foundation was started in 2012 as a combination of not only suppliers and developers but also end users of these systems.
The specification was released in 3 parts –
A The HSA System Architecture Specification focuses on how the hardware operates
B The HSA Programmers Reference Manual (PRM) addresses the software ecosystem, tool and compiler developer’s issues
C The HSA Runtime Specification which defines how the applications should interact across HSA platforms
At the launch event, there was questions and discussion on the state and scope of the memory model for the HSA architecture. The full Memory model is still in progress, but is intended to be processor type agnostic. The unified memory model will focus on the common access for CPUs, GPUs, DSPs and other specialty engines like Crypto. In addition to the memory models, there is a Domain Processors working group that is addressing the programming and application needs of these specialty processors, including the use of HSAIL as a primary interface language or not.
The launch event featured speakers from the user community in HPC, SOC suppliers, systems design companies and Universities. AMD, ARM , Imagination Technologies, LG, MediaTek, Qualcomm, University of Illinois, Lawrence Livermore National Labs and Sandia National Labs were all present to discuss the impact of the program on their products and efforts. There was an open Q&A session that ranged from performance questions to expansion of the technology into the embedded space for TVs and wearables. These wearables include both display based and non-display devices. The universities discussed the development efforts on the new compilers and libraries to integrate the specification into C++17 (also called C++1z). This is the future revision of the C++ ISO/IEC standard and is planned for completion/release in 2017.
The release event showed demos on a development system for the hardware architecture. AMD’s Carrizo processor is supposed to be the first production ready SOC supporting the full architecture specification. It will be released to products in 2nd half 2015.
The specification is currently public and available for download at www.hsafoundation.com.
