Secure power analysis at ARM Techcon

 October 2014 – At the ARM conference in Santa Clara, Rambus was showing their new Differential Power Analysis (DPA) product that was developed by their cryptography research division. The DPA space solution is targeted at keeping data private that may be radiated through fluctuations in the power supply to a chip. The EMC certification for a product does not include testing if there is information that is part of the radiated signal only the magnitude of the radiated signal. As a result, designers need to take into account how to make sure that data cannot be found or inferred from the general noise background in the power supply variation.

The soft IP solution that has been developed adds cryptography to the power supply management of the existing chip through a hardware solution. The hardware solution is just a crypto block and there is no data converters.. The solution is also available in the form of a software control set for the firmware on the chip for existing designs. The hardware IP is in the form of RTL and a constraints file that has been validated down to 28nm on the TSMC process.

At the conference there was a demonstration of a hardware implementation of the IP that fits in an FPGA. This showing was of the first level of security being offered which is AES encryption. This is the highest security currently available under suite B of the government security ratings. Following the AES encryption version, there will be a version with AES plus ECC encryption followed by support for RSA. The demo was showing an unprotected chip that had data being leaked through the power pins that was detectable by differential power analysis and is shown in the figure on the left hands window. With the hardware IP enabled the power trace is now evened out and there is no discernible data pattern that is visible in the system. This corrected data stream is shown in the right window of the figure. A second figure shows the implementation of an existing ARM chip that has a power leak that has a data leak visible in the power analysis and showing how the firmware/software solution of the cryptography base security eliminates this data leak.

The design cost for putting in this solution is the 128/256 bit AES encryption requires two clock cycles versus a traditional one in the setup of the data flow for the design. For functionality these extra clocks can be packetized and act as a pre-start for any circuit. The firmware solution that is available the software solution that is available is a combination of C language code and ARM native assembler code. The IP in it’s initial version is currently being made available to key partners and the general release will be in early 2015.

In order to verify that the hardware or the software is being used correctly Rambus and Cryptography Research are offering a complete test suite with optional hardware for doing the DPA and data leak testing. These functions are generally already on site for people who have the ARM architectural licenses and currently test with a block push down methodology.