February 2013 – This years Solid State Circuit conference featured a processor session that was focusing on increasing cache size and more cores at low power. The rise in data size being handled by these units, has driven the systems to explore new architectures that are much more throughput oriented rather than MIPS/GFLOPs oriented. This…
October 5, 2011 – San Jose, CA – The Linley Processor conference recently focused on new architectures and trends for network data processing. As video and multimedia have become more pervasive in all aspects of networking – wireless, content delivery, cloud storage & processing, and data center core applications. The larger data sized of this…
May 4, 2011, Multi-core Expo, San Jose, CA—Marcus Levy, president of the Multi-core association talked bout the issues and challenges facing the multi-core industry. He noted that the industry sector is showing a lot of imagination and is creating innovative products and concepts for multi-processor CPUs. The idea of multiple processor cores in a single…
May 3, 2011, Multi-Core Expo, San Jose, CA—Roberto Mijat from Freescale Semiconductor described some of the measurements available for evaluating multi-core performance. These measurements are a subset of the EEMBC series of embedded processor benchmarks. The multi-core benchmarks include the taxonomy and terminology for the measurements as well as various benchmark tests for functionality, test…