Device Aware High-Speed Transceiver Design in Planar and FinFet Technologies
December 16, 2014, IEDM, San Francisco—Ken Chang from Xilinx described their efforts in designing and characterizing analog sub-functions in advanced node CMOS technologies. The high device parametric variability of active and passive devices requires specialized design techniques for stable, high-performance circuits. The increasing speeds for data transmission is affecting storage, and computer architectures. Scaling process…