Netronome’s 6th Generation Flow Processor
June 2012- At the Linley Carrier conference in San Jose, Netronome discussed thier new NFP-6xxx 200Gbps flow processor that will be available in 2013. The new processor is the 6th generation of the flow processor family and is head home towards its Intel roots by using their new 22nm 3D tri-gate process. The advanced process technology allows this version of the part to address standalone appliances, as it no longer use only as a co-processor for IA systems, but now supports PowerPC, Freescale and Broadcom XLP processors.
The shift from packet based to flow based is a fundamental part of the high speed network applications is the over 10Gbps world. The NFP-6xxx supports both packet and flow processing in a single processor device. Flow is the basis for new intelligent services in a platform and is a pervasive technology in a large number of fields (fig 1). The array processor solution has been designed for handling flow through a VM without any performance impact to address current applications and IT implementations.
Network Flow Processing Applications
The high speed requirements of NG Firewalls and DPI tools have pushed the data processing requiments from just headers to full packet data. As a result, specific hardware accelerators, a 50Gbps security processing engine, and a new high bandwidth memory architecture ( as part of the 720Gbps I/O access ) were needed for the part. The part which operates at a 1Ghz clock, and includes 30MB of on-die memory has 120 flow processing cores, 96 packet processing cores, and supports 17Mb of proximity memory (supplementing available L1/L2 cache and data memory). This configuration allows the unit to process 307B instructions per second or 384 packets per second using a fully meshed internal interconnect fabric that has a 12Tbps bandwidth. The crypto engine is optimzed for single key bulk encryption for maximum throughput. The design further integrates both IPV4 and IPV6 lookup engines.
Netronome NFP-6xxx Flow Processor Block Diagram
From an implementation point of view, the 720Gbps of processor I/O includes 48-10G SERDES (operating at 12.5Gbs), 10G/40G/100G Ethernet with PHY, integrated MAC, a 4×8 PCIe Gen3 interface and direct connect for SFP+, QSFP and CFP optical fiber,
In order to allow for quick turnaround system design, the part is supported by a number of external design tools and development systems. The key is the extensive software library of functions that has fully kitted applications that do not require the designer to write any microcode to support standard fucntions.
There is an early access program underway, and volume production is planned for mid 2013.
