Single Photon Avalanche Detector (SPAD)
December 16, 2014, IEDM, San Francisco—Edoardo Charbon from Delft University of Technology presented a paper on SPAD photo-detectors. Changes in device topology and processing help improve performance while reducing parametric variations. The basic operating mode for the detector is to have a charge build-up cycle, followed by a quench upon detection, then a recharge.
The detectors can be arrayed to form an imager. The primary change to the device topology was from a 3-D structure to a planar implanted design that is compatible with standard CMOS processing. The detectors use different implant doses than the processing devices, but the SPADs can be integrated into an SoC.
Parameter extraction and device characterization show that the photon detection efficiency is function of the incoming wavelength and amount of excess bias. It is possible to change some of the materials to get different responses to other wavelengths. One important parameter is the dark count, the number of detected photon impulses.
A good detector will have a dark count in the range of 0.04 to 1 Hz per micron squared. The dark count is temperature dependent but the intended app will call for different bias levels to adjust the tradeoff between noise and sensitivity.
The final array has to consider the overall architecture and make tradeoffs between functionality and fill factors. A 1-d array has good fill since the electronics are outside the line of SPADs. A 2-D array must consider how to position the matrix of electronics and pixels to get the best combination of rows and columns. An external enhancement is to use micro-lenses over the array to focus the photons on the active areas.
Some applications for a SPAD imager are fluorescence lifetime imaging microscopy and laser photon bunch analysis. A calibrated SPAD can be used for a time-of-flight measurement for ranging functions. The inherently digital signals show better temporal resolution than most other imager technologies and the large number of timestamps allow for analysis of quantum-level spectra.
In the future, extended 3-D integration using face-face flip chip technologies can increase pixel density and allow for more complex processing per pixel. A large format imager uses microlenses and 4 ns gating to generate 156 k frames per second. These types of devices can enable a super resolution microscope. Current devices are built on fairly large process, so functionality can be improved by migrating the designs to sub 65nm processes. New materials can change individual parameters for better operation.
Although a CMOS SPAD represents a series of tradeoffs, the benefits of integrating the sensor and processing circuitry outweigh the problems. The ability to generate large numbers of high resolution timestamps will call for complex statistics and other mathematic functions for full analysis. All of these factors are contributing to the increasing commercialization of the technology.
