September 15, 2014, Custom Integrated Circuits Conference, San Jose, CA—A team from Stanford EE and CS departments is working out the kinks in Carbon Nanotube (CNT) designs. Their efforts have resulted in the demonstration of a high-energy efficiency computer. The projected values for CNTs are due to their superior electro-static parameters versus Si, and high…
July, 7, 2014, IMEC Technology Forum, San Francisco—Bobby Bell from KLA-Tencor talked about the exponentially changing technologies underlying the next generations of semiconductor manufacturing. The economics of the industry are presenting rapidly rising costs and are driving further industry consolidation. The trend of lower costs per gate is no longer valid as the process technologies…
September 23, 2013, CICC, San Jose, CA—Greg Yeric from ARM talked about the conjunction of design and technology in the sub-20 nm nodes and the need to use end product metrics as a part of the technology choice. Technology scaling has been going on for a long time, and the Moore and Denard scaling tricks…
February 21, 2011, ISSCC, San Francisco–The plenary session ended with a roundtable discussion entitled ” Beyond the Horizon: The Next 10X Reduction I Power- challenges and Solutions”. The panel looked at the challenges and changes needed to achieve a order of magnitude reduction in power consumption. Jan Rabaey from UC Berkeley moderated the discussion, assisted…